設(shè)計(jì)依據(jù):
CPCI Specification PICMG 2.0 R3.0 (October 1, 1999)
CPCI Hot Swap Specification PICMG 2.1 R1.0 (August 3, 1998)
CPCI System Management Specification PICMG 2.9 R1.0 (February 2, 2000)
Keying of CPCI Boards and Backplanes PICMG 2.10 R1.0 (October 1, 1999)
CPCI Power Interface Specification PICMG 2.11 R1.0 (October1, 1999)
總線結(jié)構(gòu):
P5 | Rear IO | |||||||
P4 | ||||||||
P3 | ||||||||
P2 | 64bit\33MHz CPCI Bus | |||||||
P1 | ||||||||
Slot | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 |
系統(tǒng) | 外圍槽 | |||||||
技術(shù)參數(shù):
槽數(shù): 1 System Slot +7 Peripheral slots；
結(jié)構(gòu)尺寸: 262.05 x 161.72 x 3.8mm(H×W×T)；
電源輸入方式：M3接線柱方式，ATX供電方式；
背板最大電壓降: <20mV；
V(I/O): +3.3V / +5V可選，出廠默認(rèn)+5V；
單端阻抗: 65ohm ±10% for trace.
工作溫度: 0℃ ~ +55℃
貯存溫度: -40℃ ~ +85℃
MTBF: 700,000h
