VIAVI Xgig 1000 PCIe協(xié)議分析儀

VIAVI Xgig? 1000 PCIe 和 NVM Express分析儀是的、功能大的 PCIe 應(yīng)用程序監(jiān)控和分析系統(tǒng)，它擁有先進(jìn)的跟蹤和分析能力，能夠?qū)α髁窟M(jìn)行深入分析。該多用途、多協(xié)議工具可幫助用戶克服高速串行設(shè)計難題，加快當(dāng)今使用 PCI Express 技術(shù)的存儲區(qū)域網(wǎng)絡(luò)（SAN）、存儲子系統(tǒng)和解決方案的開發(fā)。Xgig 1000 PCIe 解決方案支持包括 NVM Express 在內(nèi)的 PCIe 協(xié)議。

主要優(yōu)勢

· 業(yè)界大的跟蹤能力和先進(jìn)的監(jiān)控和分析工具，使故障排除變得十分簡單

· 通過在幀和流量/交換視圖內(nèi)進(jìn)行 DWORD 搜索等獲得的搜索和過濾功能加快開發(fā)

· 與其他 VIAVI 協(xié)議分析儀串聯(lián)，用于 FC、FCoE、SAS 和 SATA 時間同步跟蹤

· 通過高級的腳本編寫和捕獲功能自動檢測故障

· 準(zhǔn)確捕獲所有數(shù)據(jù)線速率，包括 8 GT/s、5 GT/s 和 2.5 GT/s

· 解碼所有 PCI Express 通信，包括 TLP 和 DLLP 序集

· 支持本機(jī) PCIe Gen3 和 NVM Express

· 便攜、輕量、獨立的系統(tǒng)

· 專家模式支持本機(jī) PCIe 和 NVM Express

The Xgig? 1000 analyzer for NVMe and PCI Express 3.0 is the latest addition to the VIAVI family of high-speed, serial protocol-analysis solutions. It seamlessly connects with the existing Xgig family of SAS, SATA, Ethernet, FC, and FCoE analyzers, providing an integrated trace view of all highspeed traffic in today's complex, multi-protocol environments.

This powerful tool also triggers and captures all SSD-based NVMe, PCIe, and AHCI-SATA Express traffic. Triggers include speed change, MSI+MSI-X, and all NVMe standard and custom OP codes. The analyzer easily captures and displays NVMe-specific features like PRP tables and dynamic queue updates. And, the 64 G buffer (32 G x 2) is lane-width independent, so full buffer captures are supported for all X1, X2, X4, and X8 traffic.

The analyzer ships with a standard X8 PCIe Gen3 interposer, and a dedicated VIAVI team works with each customer on solving physical analyzer/system connection challenges. SFF 8639, M.2, and low-profile server interposer solutions are also available. VIAVI also has an array of 3rd-party cable and board solutions that solve many of today's connection challenges. Please contact your local VIAVI representative for details.

• Supports native PCIe and PCIe Gen3 at all link speeds

• Supports NVMe with full trigger capability on messages

• Decodes all PCIe/NVMe traffic including TLP, DLLP, training sequences, ordered sets, queue pairs, PRPs, and configuration space

• Displays packets on a time-synchronized trace; protocols can be toggled on/off for ease of debug

• Supports SRIS

• Decodes all NVMe and PCIe data to text—no more referring to the spec

• One-year hardware and three-year software warranties

• Cascadable with other VIAVI analyzers to display multi-protocol packets on a single trace

• Portable, lightweight, and standalone